Report: TSMC unveils 2-nm technology..get to know it

Taiwan semiconductor manufacturing company published (TSMC) Officially about the 2-nm node, it is dubbed N2. Scheduled in 2025.

Plan to announce TSMC will provide a performance boost in power performance at the same power levels.

she spoke TSMC About 2 . Technologyn The new one at length, explaining the inner workings of its structure. will be 2n first knot TSMC mass field effect transistors are usedGAAFETs) It will increase the intensity of the scents on the knot N3E Matters 1.1 times. Before version 2n Absolutely, you will shoot TSMC 3 nm chips, see their masterpieces also in a seminar TSMC Technology for the year 2022.

Node 3 . will comenm In five different levels, and with a new version, the number of transistors will increase, their height and efficiency will increase. From N3 will be issued TSMC Later N3E (improved) and N3P (performance enhancer) and N3S (density enhancer) N3XThe first 3nm chips are said to have been launched in the second half of this year.

on that process 3nm Closer to us in terms of launch, except that 2nm ? It seems that the goal TSMC from knot 2nm Obvious – the high performance architecture as a whole has a lot to recommend it. From the same nanosheet GAA as an example. White channels surrounded by gates on all sides. Optimizing links, which leads to better performance, which leads to better performance, which leads to better performance.

will save all of N3 And the N2 Significant increases in performance N5 current, and all offer the option of balancing power consumption per watt. Example (First shared by Tom’s devices) , comparison N3 networked N5 by up to 15% in initial performance, and by up to 30% power reduction at the same range. will bring N3E These numbers to even greater, up 18% and 34%, respectively.

and currently N2 This is where things start to get exciting. We can expect to write a performance increase of up to 15% at an idea in the same power draw as a knot N3E and the frequency has been reduced to the levels it provides N3E and bean N2 It will save up to 30% less energy consumption.

where N2?

From the mobile phone system on the chips (SoCs) advanced architectures, and processors in equal measure.

mentioned TSMC To be a practical process 2nm is “integration” Chiplet”. This means that manufacturers may use N2 Harvest the energy in their chips.

And once it becomes N2 Here, it’s highly outfitted for all kinds of hardware, including mainframes and CPUs, processing power and heat. But the report indicates that it begins TSMC Narrow writing until 2025, logical retrospect, is unlikely to wear out or underpin the 2nm production market before 2026.

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